back to article Intel and VMware get their RAS on

Not content with adding comprehensive power-saving features to its processors, Intel is working on extending advanced power management for server memory as well as improving memory-error protection. These improvements are under the umbrellas of RAS - a term originated 'way back when' by IBM to denote technologies related to …

COMMENTS

This topic is closed for new posts.
  1. rbrunner

    Just a few tiny corrections ...

    Thanks so much for coming to the session yesterday!

    Actually, I think I said in the slides that Distributed Power Management, a shipping feature of VMware ESX 3.5 and vSphere 4.0, was able to save 73% power in a real world case that was cited. The memory power mgmt demo showed that we could save ~100W - ~200W (in a system showing 1000W partially idled) by placing half of the DIMMs in the system into software-controlled standyby or offline.

    Just to clarify, the patrol scrubber is a background autonomous hardware process that is configued by BIOS. Without affecting normal system operation, the memory controller will

    continuously perform read/write operations on memory correcting any soft errors that may exist in memory. The write will re-generate the ECC bits, update them if you will. If in the process of the read, an uncorrectable memory error is encountered (double-bit or higher), then an error (such as MCE) can be flagged to software and in older systems, the system would need to reboot. Our demo used new Intel technology that can remove this need if the error hits non-hypervisor pages. (For a quick description of memory scrubbing, see this link: http://h20000.www2.hp.com/bc/docs/support/SupportManual/c00218059/c00218059.pdf)

    - Rich Brunner

  2. Anonymous Coward
    Pint

    RAS on memory is not very new......

    It was done by Tandem and Fujitsu on *their* SPARC (not Sun's) many years ago, already.

    IBM's power is going to have it with P7.

  3. rbrunner

    New on x86

    Our session did not imply that this was new to the overall computer industry; our point was that mainframe techniques are coming to x86 and that some of these are new to x86 servers.

This topic is closed for new posts.

Other stories you might like