Re: World’s Most Popular CPU Architectures
A few months ago I read a concise and excellent book called "The RISC-V Reader: An Open Architecture Atlas". About half the book's contents discuss the RISC-V instruction set and provide examples of use, while the other half is of the form "Previous generations of CPU architectures did [such-and-such] which history has shown to be useful so RISC-V embodies those ideas, but previous generations of CPU architectures also did [something else] which history has shown to not be useful, so RISC-V avoids those mistakes." For better or worse, the two different kinds of contents are inter-mingled in each chapter of the book (I found that inter-mingling to be useful, but not everyone will). The main takeaway I got from the book is that the RISC-V architecture is as elegant as it is because its designers "stood on the shoulders of giants before them to see farther". That, combined with RISC-V being a much newer architecture than x86 or ARM means that RISC-V contains several orders of magnitude fewer instructions than those other CPU architectures.
Of course, a product being elegant is rarely enough to help it compete against the incumbent market leaders. But a few other characteristics of RISC-V do help in that regard.
First, the RISC-V specification is open-source, so this helps to drive down costs, which matters to a company that makes, say, a USB/Bluetooth keyboard that needs a tiny embedded CPU and sells in a market with competing keyboards priced from as little as £5.00.
Second, the RISC-V specification contains just 47 required instructions, and all other instructions are optional but packaged into logical groups (e.g., integer multiplication and division, floating point instructions, bit manipulation instructions, vector instructions and so on). It is possible to implement a 32-bit RISC-V CPU for the minimal required instruction set in just a few tens of thousands of transistors, and this can increase yield rates from silicon wafers, thus resulting in a very low manufacturing cost, while still giving developers of embedded systems a modern, clean 32-bit instruction set to work with. At the other extreme, it is expected that a 64-bit RISC-V CPU with all the optional instructions, lots of CPU-internal parallelism (out-of-order execution, superscaler and other buzz words), and tons of on-board cache could be implemented with many billions of transistors so it can compete against powerful ARM/x86 CPUs in server machines.
Third, because the RISC-V architecture is new, lean and does not carry the same backwards-compatible baggage as ARM/x86, it looks like a RISC-V CPU might use less electrical power as an ARM/x86 CPU that provides similar performance. This electrical power efficiency will help RISC-V not just in the embedded systems market, but also in the data centre and supercomputer markets, where managing heat build up is a big concern.
My interest in RISC-V is that I want to buy a development board so I can ensure some (to be) open-source software I am writing will work well on RISC-V. From what I have seen, it looks like RISC-V manufacturers are taking a bottom-up approach to the CPU marketplace. They are initially attacking the low-cost embedded systems market, and are slowly moving up towards more powerful CPUs. The last time I checked (a few months ago), the most powerful RISC-V CPUs were 4-core devices that were approximately as powerful as a Raspberry Pi 4, but one manufacturer was setting a motherboard with with many such CPUs to provide a total of (if I remember correctly) 64 cores. A year earlier, the most powerful RISC-V CPU I saw was only half as powerful as a Raspberry Pi 4, so doubling performance in just 1 year shows progress is being made. I assume it will take a few years before we start seeing desktop-grade RISC-V CPUs, but already having some companies developing multi-socket motherboards suggests there won't be a significant delay between desktop- and server-grade RISC-V.
Biting the hand that feeds IT
